Teledyne Technologies

Lista de puestos / Job Listings


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Localizaciones de empleo / Job Locations ES-Seville
Fecha de publicaciòn / Posted Date 4 days ago(1/15/2021 7:28 AM)
RESPONSIBILITIES: - Maintenance and improving of laboratory/clean room and storage area. - Executing assignment production activities and informing to Production Department about any incident during the task development. - Preparing, validating and configuring the platforms required to perform the acceptance tests.
ID de la solicitud / Requisition ID
2021-14553
Nombre de empresa / Company Name
Teledyne Anafocus
Work Location : Country (Full Name)
Spain
Localizaciones de empleo / Job Locations ES-Seville
Fecha de publicaciòn / Posted Date 5 months ago(8/13/2020 4:45 AM)
Digital designer Overview of Role:                                                                                               This role would ideally be suited to an experienced engineer with recent digital CMOS design experience looking for a new challenge. The candidate should have the potential to lead future digital designs and digital architecture choices working with both internal and external subcontractors.   Personal development opportunities will be available throughout our global international organisation for high performers.   Your personal values must be in line with ours: Agility, Integrity, Excellence throughout and Customers first.   Main Accountabilities Digital Design ·        Participate to the feasibility study of new projects by providing design solutions and development time estimations. ·        Designing and implementing digital sequencer, feature and processing functions for imaging (specification, architecture, code, P&R, post layout timing analysis and review of layout, simulation, test strategy, robustness of the design). - To ensure that designs are right first time or that only a metal fix is required if that has been defined in the programme plan. - Ensure that newly design circuits have been designed for ease of testability. ·        Support the camera development, test and characterization team.   Personal Accountability Improvement Innovation (Sense of) Raising the Bar Continuous Improvement - To participate in the continuous improvement of the design flow for space and Astronomy. To ensure that the right tools and methodology are put in place to satisfy the flow requirements.   Improvement Innovation - Protect our intellectual property and hence market position by identifying novel solutions for patent protection - To contribute to the design of new technology building blocks to ensure that T-e2v can meet the needs of space customers in the future.   Improvement Innovation (Sense of)   Design Leader Support ·        Support and mentor more junior members of the team ·        Deputise design leader during the project execution Leadership   Key Internal interfaces : ·        CMOS Design Leader ·        CMOS design work-package manager ·        Camera development tem ·        Characterisation team ·        Package design team   Mobility/ travel : <10% of the working time  
ID de la solicitud / Requisition ID
2020-13387
Nombre de empresa / Company Name
Teledyne e2V Space Imaging
Work Location : Country (Full Name)
Spain
Localizaciones de empleo / Job Locations ES-Seville
Fecha de publicaciòn / Posted Date 5 months ago(8/13/2020 4:45 AM)
Layout Summary and responsibilities Overview of Role:   This role would ideally be suited to an experienced layout engineer with recent analogue and mixed-signal CMOS design experience looking for a new challenge. The candidate should have the potential to lead future new custom designs working with both internal and external subcontractors.   Personal development opportunities will be available throughout our global international organisation for high performers.   Your personal values must be in line with ours: Agility, Integrity, Excellence throughout and Customers first.   CMOS Layout Design - To create cell-level layout, based on the design rules of the foundry. - To be adaptable and apply an extra set of rules regarding radiation hardness, based on the radhard design rules of Te2v. - To follow best practice based on general IC CMOS layout design - To design based on the concept of reusing IPs, but also on the limitations of top level layout coming next - To be able to perform top-level layout activities - To be able to verify the layout (using PVS tools). - Layout tasks involve analogue, mixed-signal (ADC) and full custom blocks for imaging. - To participate in the continuous improvement of the design flow for space and Astronomy. To ensure that the right tools and methodology are put in place to satisfy the flow requirements. - Protect our intellectual property and hence market position by identifying novel solutions for patent protection - To contribute to the design of new technology building blocks to ensure that e2v can meet the needs of space customers in the future.  - Support and mentor more junior members of the team
ID de la solicitud / Requisition ID
2020-13385
Nombre de empresa / Company Name
Teledyne e2V Space Imaging
Work Location : Country (Full Name)
Spain